In this post, I am trying to explain the difference between m_sequencer and p_sequencer in UVM and their usage.
Firstly, let's look for the details about m_sequencer's type, it's scope and role. Basically, m_sequencer is the sequencer on which our sequence will run. In other words, it is the default sequencer and it will point to the user sequencer's handle on our test bench. Let's look at how it is pointing to the test bench's user sequencer.
From the above image, we can see that the m_sequencer instance type is "uvm_sequencer_base" and an instance is taken in the "uvm_sequence_item" class, therefore it is visible to any user sequence. Type of m_sequencer is "uvm_sequencer_base".
If the user sequence has "`uvm_declare_p_sequencer" macro then this macro defines p_sequencer handle whose type will be user_seqr. If this macro is not declared in the user sequence then p_sequencer does not exist.
So, when "user_seq.start(user_seqr)" method gets execute from the test then "set_sequencer()" method gets invoked and user_seqr(child class) handle will be assigned to uvm_sequencer_base(parent class) handle i.e. m_sequencer. Further "m_set_p_sequencer()" method gets execute if "`uvm_declare_p_sequencer" is declared in the user sequence which casts m_sequencer(parent class uvm_sequencer_base's handle) to p_sequencer (child class user_seqr's handle) to check type compatibility.
In summary, m_sequencer is uvm_sequencer_base type and will point to the user sequencer when the user sequence is initiated. Whereas p_sequencer is user sequencer type when macro "`uvm_declare_p_sequencer" is declared in user sequence. I hope this post will help to understand m_sequencer and p_sequencer.
Firstly, let's look for the details about m_sequencer's type, it's scope and role. Basically, m_sequencer is the sequencer on which our sequence will run. In other words, it is the default sequencer and it will point to the user sequencer's handle on our test bench. Let's look at how it is pointing to the test bench's user sequencer.
From the above image, we can see that the m_sequencer instance type is "uvm_sequencer_base" and an instance is taken in the "uvm_sequence_item" class, therefore it is visible to any user sequence. Type of m_sequencer is "uvm_sequencer_base".
If the user sequence has "`uvm_declare_p_sequencer" macro then this macro defines p_sequencer handle whose type will be user_seqr. If this macro is not declared in the user sequence then p_sequencer does not exist.
So, when "user_seq.start(user_seqr)" method gets execute from the test then "set_sequencer()" method gets invoked and user_seqr(child class) handle will be assigned to uvm_sequencer_base(parent class) handle i.e. m_sequencer. Further "m_set_p_sequencer()" method gets execute if "`uvm_declare_p_sequencer" is declared in the user sequence which casts m_sequencer(parent class uvm_sequencer_base's handle) to p_sequencer (child class user_seqr's handle) to check type compatibility.
In summary, m_sequencer is uvm_sequencer_base type and will point to the user sequencer when the user sequence is initiated. Whereas p_sequencer is user sequencer type when macro "`uvm_declare_p_sequencer" is declared in user sequence. I hope this post will help to understand m_sequencer and p_sequencer.
